--
-- ask_mod.vhd
--
-- This module demonstrates the use of the NCO module to implement a
-- simple Amplitude Shift Keying modulator.
--
-- Ports:
--
--   ask_clk    - The clock (at sampling frequency).
--   datain     - Data to be modulated.
--   ask_output - ASK modulated output.
--
-- Dependencies:
--
--   * nco.vhd
--

LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY ask_mod IS
  PORT(ask_clk: IN std_logic;
       datain: IN std_logic;
       ask_output: OUT std_logic_vector(7 downto 0));
END ask_mod;

ARCHITECTURE archask OF ask_mod IS
  signal carrier: std_logic_vector(7 downto 0);
  signal f: std_logic_vector(23 downto 0);
  signal period: std_logic;
  signal dummy: std_logic_vector(0 downto 0);
BEGIN
	
  dummy <= "0";

  -- change this to use a different carrier frequency.
  f <="000000100000000000000000";

  osc: work.nco
    GENERIC MAP(24,9,8,1)
    PORT MAP(ask_clk, f, dummy, carrier, period);

  ask_output <= carrier when datain='1' else (others => '0');

END archask;

--
-- END ask_mod.vhd
--